Electra IC verification services: EAVS and 5G solutions
Quick answer: Design verification has been Electra IC’s core area of expertise since its founding. The company provides integrated circuit verification services using the VHDL, SystemVerilog, UVM, UVVM and OSVVM methodologies, develops its own verification suite called EAVS, and on the 5G side offers the PRACH IP Suite and an O-RU M-Plane solution. EAVS won the third-place presentation award at the SNUG 2025 Munich event. The verification services are packaged together with DO-254, EN 50129 and ISO 26262 functional safety consultancy.
What does the verification service cover?
Integrated circuit verification is the engineering discipline that finds design errors in a chip before production; in modern chip projects it can consume more than half of the engineering effort. According to its official services page, Electra IC works with five industry-standard methodologies in this field and serves domestic and international customers on defense, automotive, mobile and consumer electronics projects. The presence of organizations such as TUBITAK BILGEM, ASELSAN and Nokia on the company’s reference list is connected to this service line; project details are not officially disclosed.
EAVS: the company’s own verification suite
EAVS (Electra IC Advanced Verification Suite) is a SystemVerilog and UVM based verification environment targeting RISC-V and ARM based designs in the automotive, defense and mobile sectors. The company introduced the suite for RISC-V cores in February 2025; in June 2025 the EAVS presentation won the third-place award at SNUG Munich, the Synopsys user event. The suite’s licensing model is not officially disclosed.
| Product/Service | Field | Highlight |
|---|---|---|
| Verification services | ASIC/FPGA | VHDL, SystemVerilog, UVM, UVVM, OSVVM |
| EAVS | RISC-V/ARM verification | Third place for its SNUG 2025 Munich presentation |
| PRACH IP Suite | 5G NR O-RAN | MATLAB model + RTL + verification environment |
| O-RU M-Plane | 5G radio unit | O-RAN M-Plane v12.0 support |
| Functional safety | Aviation, rail, automotive | DO-254, EN 50129, ISO 26262 |
The 5G portfolio: PRACH and O-RU M-Plane
The PRACH IP Suite is a design and verification package for the 5G NR O-RAN Split 7.2x architecture; it bundles a MATLAB model, an RTL implementation and a verification environment. The architecture-independent O-RU M-Plane solution supports hierarchical models based on O-RAN M-Plane version 12.0, accelerating 5G radio unit development. The company exhibited its 5G products at SAHA EXPO 2024 and MWC Barcelona; in February 2026 it joined the 6G and Beyond Communications Technologies Cluster.
Methodology diversity as a competitive edge
While most firms in the verification market specialize in a single methodology, Electra IC serves both the SystemVerilog/UVM world and the VHDL world’s UVVM and OSVVM frameworks. This diversity allows chip projects dominated by UVM and European avionics and defense projects where the VHDL tradition persists to be taken on under the same roof. The company also described in an application note published in 2020 how it speeds up the design-verification cycle using static RTL analysis with Blue Pearl Software tools.
The training arm: EIC Academy and Doulos
As a certified training partner of Doulos, the company delivers VHDL, Verilog, SystemVerilog, UVM and embedded systems courses, and also offers AMD training. The tenth cohort of the EIC Academy engineer development program began in July 2025. A non-thesis master’s program was opened with Bahcesehir University in January 2023. The verification expertise also feeds the quality assurance of the crypto cores and the avionics IP family. The company profile is described in the main file. The training activity doubles as a recruitment channel: some academy graduates join the company’s verification and design teams, growing in-house the pool of verification engineers that remains scarce in Turkey.
Frequently asked questions
What is UVM?
Universal Verification Methodology; an industry-standard, SystemVerilog based methodology for integrated circuit verification.
Which processors does EAVS support?
The company stated that it targets RISC-V and ARM based designs.
Who is the PRACH IP Suite for?
It is aimed at equipment manufacturers and integrators developing 5G radio units with the O-RAN Split 7.2x architecture.
Which standards does the functional safety service cover?
DO-254 in aviation, EN 50129 in rail systems and ISO 26262 in automotive are covered; the company also provides training in these areas.
Have service fees been published?
Not officially disclosed.
Sources and verification note
Service descriptions were taken from the company’s official service and product pages; the EAVS award, 5G products and training programs were compiled from the company’s news archive. Customer projects and prices were not written because they have not been disclosed.
- https://www.electraic.com/design-verification-services (Accessed: August 13, 2026)
- https://www.electraic.com/products/design-ip-cores (Accessed: August 13, 2026)
- https://www.electraic.com/news/eavs-wins-3rd-place-presentation-award-at-snug-2025-munich (Accessed: August 13, 2026)
- https://www.electraic.com/news/eavs-electra-ic-advanced-verification-suite-for-risc-v-cores (Accessed: August 13, 2026)
- https://www.electraic.com/trainings (Accessed: August 13, 2026)
